Quantifiable Assurance: From IPs to Platforms

Hardware vulnerabilities are generally considered more difficult to fix than software ones because they are persistent after fabrication. Thus, it is crucial to assess the security and fix the vulnerabilities at earlier design phases, such as Register Transfer Level (RTL) and gate level. The focus of the existing security assessment techniques is mainly twofold. First, they check the security of Intellectual Property (IP) blocks separately. Second, they aim to assess the security against individual threats considering the threats are orthogonal. We argue that IP-level security assessment is not sufficient. Eventually, the IPs are placed in a platform, such as a system-on-chip (SoC), where each IP is surrounded by other IPs connected through glue logic and shared/private buses. Hence, we must develop a methodology to assess the platform-level security by considering both the IP-level security and the impact of the additional parameters introduced during platform integration. Another important factor to consider is that the threats are not always orthogonal. Improving security against one threat may affect the security against other threats. Hence, to build a secure platform, we must first answer the following questions: What additional parameters are introduced during the platform integration? How do we define and characterize the impact of these parameters on security? How do the mitigation techniques of one threat impact others? This paper aims to answer these important questions and proposes techniques for quantifiable assurance by quantitatively estimating and measuring the security of a platform at the pre-silicon stages. We also touch upon the term security optimization and present the challenges for future research directions

Neural bases of enhanced attentional control: Lessons from action video game players.

OBJECTIVES: The ability to resist distraction and focus on-task-relevant information while being responsive to changes in the environment is fundamental to goal-directed behavior. Such attentional control abilities are regulated by a constant interplay between previously characterized bottom-up and top-down attentional networks. Here we ask about the neural changes within these two attentional networks that may mediate enhanced attentional control. MATERIALS AND METHODS: To address this question, we contrasted action video game players (AVGPs) and nonvideo game players (NVGPs) in a Posner-cueing paradigm, building on studies documenting enhanced attentional control in AVGPs. RESULTS: Behavioral results indicated a trend for more efficient target processing in AVGPs, and better suppression in rare catch trials for which responses had to be withheld. During the cue period, AVGPs recruited the top-down network less than NVGPs, despite showing comparable validity effects, in line with a greater efficiency of that network in AVGPs. During target processing, as previously shown, recruitment of top-down areas correlated with greater processing difficulties, but only in NVGPs. AVGPs showed no such effect, but rather greater activation across the two networks. In particular, the right temporoparietal junction, middle frontal gyrus, and superior parietal cortex predicted better task performance in catch trials. A functional connectivity analysis revealed enhanced correlated activity in AVGPs compared to NVGPs between parietal and visual areas. CONCLUSIONS: These results point to dynamic functional reconfigurations of top-down and bottom-up attentional networks in AVGPs as attentional demands vary. Aspects of this functional reconfiguration that may act as key signatures of high attentional control are discussed